SPI
asahi Asahi hardware
84 runs match
results
No report has tested this yet: no check covers it in this version of omarchy-m-test.
expected per chip
| Chip | Asahi | Aurora | Omarchy |
|---|---|---|---|
| M1 | upstream 6.15 | asahi | – |
| M1 Pro/Max/Ultra | upstream 6.15 | asahi | – |
| M2 | upstream 6.15 | asahi | – |
| M2 Pro/Max/Ultra | upstream 6.15 | asahi | – |
| M3 | linux-asahi | unknown | – |
| M3 Pro | linux-asahi | unknown | – |
| M3 Max | linux-asahi | unknown | – |
| M3 Ultra | linux-asahi | unknown | – |
| M4 | tba | unknown | – |
| M4 Pro/Max | tba | unknown | – |
| A18 Pro | tba | unknown | – |
Asahi-layer states are from the Asahi Linux documentation's feature-support tables (m1.md, m2.md, m3.md, m4.md), (c) the Asahi Linux contributors, licensed under CC BY 3.0 (https://creativecommons.org/licenses/by/3.0/). Converted from table cells to per-chip states; unmodified cell text is kept in each state's "cell".